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| CML Semiconductor Products PRODUCT INFORMATION FX506 Features/Applications Full Rx and Tx Filtering to CEPT Standards Digital Control of Volume, Noise Squelch and R.S.S.I. Tx VOGAD Circuitry Serial P Control of ALL Chip Functions Deviation Limiter Rx EXTERNAL AUDIO PROCESSES Mobile Radio Audio Processor Publication D/506/3 July 1994 Military/Marine and Mobile Radio Applications FM/AM/SSB Applications 16-kbit Data and Voice Scrambler Compatible Low-Power 5-Volt CMOS Process Tx RECEIVER AUDIO 4.0MHz RSSI MODULATION CTCSS and DATA Tx AUDIO MIC.1 REF. TRANSMITTER VCO FX506 Single-Chip Audio Processor SERIAL SQUELCH/CARRIER DETECT BUS SYSTEM UP FX506 PA MIC.2 HIGH SQUELCH LOW P VOLUME DOWN Brief Description The FX506 is a Processor-controlled, single-chip device containing ALL the circuit elements necessary to perform the audio functions of a mobile (or portable) radio system. On-chip signal paths include: speech-band/preemphasis filters, variable gain/attenuation stages, voice-compression and deviation limiter circuitry. Each function in the signal path can be addressed or by-passed -- providing "real-time," dynamic control -- by the Processor. This half-duplex device comprises two separate audio signal paths. The Pre-Process Path performs filtering and level adjustment on audio (Rx or Tx) for use in auxiliary systems such as "Frequency Inversion Scrambling," "Sub-Audio" tone or "In-Band" data signalling. This path is output at the "Pre-Process Audio Output" pin. If no external processes are being used this output should be connected to the "Pre-process Audio Input" pin. The Post-Process Path can adjust and prepare the input audio for output to the chosen transmitter driver or loudspeaker amplifier. Suitably software configured, the FX506, which can operate on voice, direct-digital or tone-data and subaudio frequencies, is compatible with FM, AM and SSB type transceivers. Digital gain elements are provided on-chip for dynamic control and balance of signal-path levels during manufacturing, test and operation. System Squelch, a separate path, is sourced from either the incoming signal or Received Signal Strength Indication (R.S.S.I.) from the radio circuitry. The FX506, a low-power 5-volt CMOS device, is available in 24-pin/lead plastic DIL and SMD packages. Pin Number DIL Quad FX506P FX506LG FX506LS 1 Function Xtal: The output of the 4.0MHz on-chip clock oscillator. 2 Xtal/Clock: The input to the on-chip 4.0MHz clock oscillator inverter. All oscillator components are included on-chip. A 4.0MHz Xtal or externally derived clock should be connected here. See Figure 2. 3 VDD: Positive supply rail. A single, stable +5-volt supply is required. Levels and voltages within the Audio Processor are dependent upon this supply. Post Process Audio Input: The analogue input to the Post-Process Path from external audio operations. Inputs to this pin should be a.c. coupled via a capacitor C7. See Figures 2 and 4. 4 5 Pre-Process Audio Output: The analogue output to external audio operations. See Figure 4. 6 Rx Audio Input: The input from the radio receiver demodulator. This input, which requires to be a.c. coupled via capacitor C6, is selected by serial data. Audio at this input will be available for use as a signal-squelch noise source. See Figures 2 and 4. 7 VBIAS: The output of the on-chip analogue bias circuitry, held internally at VDD/2. This pin should be decoupled to VSS via capacitor C1. See Figure 2. 8 CTCSS/Data Input: To allow the introduction of sub-audio tones or data to the VCO drives. By manipulation of bits 17, 18 and 19 this input can be "mixed" into the signal path or added as a burst in between speech segments. 9 Tx Audio Input: The pre-process transmit audio input. This input can be driven from an external source or from the FX506 Mic. input circuitry. See Figures 2, 3 and 4. 10 Mic. Output: The output of the microphone multiplexer, selected by serial input data. If additional gain is required for the pre-process input, an external amplifier as shown in Figure 3 is recommended. 11 Mic.1 Input: These separate microphone audio inputs are individually selected by the serial input data. See Figures 2, 3 and 4. 12 Mic.2 Input: 13 VSS: Negative supply rail (GND). 2 Pin Number DIL Quad FX506P FX506LG FX506LS 14 Function Compression Capacitor: External components connected to this pin provide the required compression time-constant. See Figure 2. 15 Audio Output (Rx): The received audio output from the Post-Process path. This output is data selected and when powersaved is held at VBIAS. 16 VCO Ref. Drive (Tx) Output: The output to drive the modulation reference oscillator. This output is data selected and when powersaved is held at VBIAS. To prevent any d.c. level at this output causing incorrect frequency selection it is recommended that a.c. coupling components as shown in Figure 2 are employed. For modulation down to near d.c., these components should be bypassed. 17 VCO Drive (Tx) Output: The output to drive the modulation VCO. This output is data selected and when powersaved is held at VBIAS. 18 R.S.S.I.: The input to the Squelch Selection circuitry from the radio's Received Signal Strength Indicator output. A data selected input. 19 Noise Input: The noise level can be applied to this pin. This would be the Noise Output integrated by external components, as indicated in Figure 2, or an externally produced noise level. 20 Noise Output: The output of the on-chip "squelch noise rectifier." This output is a half-wave rectified d.c. level that can be applied to the Noise Input via external integrating components. This output could also be used by an external signal detector circuit. This output level is at VBIAS for no input. See Figures 2, 3 and 4. 21 Squelch Drive: A TTL compatible output. The inputs to the comparator are: the logically selected threshold level from the Digital-to-Analogue converter and the selected noise input. A logic "0" signifies that the noise threshold has been exceeded. 22 Serial Clock: The externally produced serial data loading clock input. See Figure 5. This input has an internal 1M pullup resistor. 23 Serial Data: The controlling, 47-bit serial data input. With Chip Select maintained at a logic "0" the serial data is entered at this pin, loaded bit 46 first, bit 0 last. Detailed information on the allocation and function of serial data bits (0 to 46) is given in tabular form on later pages. Data load timing should be carried out as described in Figure 5. This input has an internal 1M pullup resistor. 24 Chip Select: The data loading control function. During serial loading this input should be operated as shown in Figure 5. New data is latched on the rising edge of this waveform. This input has an internal 1M pullup resistor. 3 External Components and Interfacing V DD C 9 VSS XTAL 1 X1 24 23 22 21 20 CHIP SELECT SERIAL DATA INPUT SERIAL CLOCK INPUT SQUELCH DRIVE NOISE OUTPUT R2 2 VDD XTAL/CLOCK POST PROCESS AUDIO INPUT C7 3 4 PRE-PROCESS AUDIO OUTPUT Rx AUDIO INPUT C6 VBIAS CTCSS/DATA INPUT Tx AUDIO INPUT 5 6 7 8 9 C FX506P R4 NOISE INPUT R.S.S.I. VCO DRIVE (Tx) VCO REF. DRIVE (Tx) 19 18 17 16 15 14 13 VSS SEE FIG.3 BELOW MIC. OUTPUT MIC. INPUT 1 MIC. INPUT 2 3 10 11 12 C AUDIO OUTPUT (Rx) COMPRESSION CAPACITOR 5 R3 C2 C C4 1 C 8 R VSS 1 VBIAS Fig.2 Recommended External Components Notes MIC. I/P 1 R6 10 C 10 11 C3 /C 4 12 MIC. O/P - R5 Tx AUDIO INPUT 9 MIC. I/P 2 BIAS + EXTERNAL OP-AMP Fig.3 Typical 2nd Order Pre-emphasis Input Circuit For dual Tx inputs using both Mic.1 and Mic.2 inputs without pre-emphasis, capacitors C3 and C4 will be required at the inputs as shown in Figure 2. If pre-emphasis is required, the external circuit shown in Figure 3 is recommended. The Op-Amp selected for this application should be of a "low noise wide-bandwidth" type i.e. with at least 60dB of gain at 6kHz. In addition to the components shown in Figure 2, it is recommended that the power and VBIAS lines to the external Op-Amp are decoupled to VSS physically close to the amplifier, by a 1.0F capacitor. Circuit References Component R1 R2 R3 R4 R5 R6 = Value 100k 390k 100k 10k 18.0k 2.7M Tolerance = 10% 10% 1% 10% 1% 1% C1 C2 C3 C4 C5 C6 = 1.0F 6.8F 1.0nF 1.0nF 15nF 0.1F 20% 20% 1% 1% 1% 20% C7 C8 C9 C10 X1 = 0.1F 0.1F 1.0F 12.0pF 4.0MHz 20% 20% 20% 1% Layout Recommendations Audio microcircuit performance will be affected by external noise. All external components should be kept as close to the device as possible. Tracks to the device should be kept short, particularly the Audio and VBIAS inputs. A "ground-plane" connected to VSS will help to eliminate external pick-up. Ensure that all inputs (analogue and d.c.) are free from noise. Xtal/clock and digital tracks should be kept well away from analogue circuitry. Analogue inputs and outputs should be screened wherever possible with high-level outputs isolated from very low-level inputs. 4 PMR Audio Processor PRE-PROCESS PATH COMPRESSION CAPACITOR n GPS Explanatory Block Diagram KEY # = Controlling Logic Bit Number/s = Adjustable Element, n = Number of steps = General Powersave # 10, 11, 12, 13 16 #0 MIC. 1 Threshold # 3, 4, 5, 6 16 0/14dB MIC. SELECT DETECT MIC. 2 # 1, 2 INPUT SELECT DE-EMPHASIS MIC. OUTPUT 20dB/dec. PRE-PROCESS AUDIO OUTPUT Rx AUDIO INPUT (GPS) 300Hz COMPRESSOR (VOGAD) 0dB Gain INPUT LPF INPUT HPF 3000Hz (GPS) # 14 INPUT GAIN AMP (0 to 15dB) PRE-PROCESS GAIN (-2.75dB to +1.0dB) Rx (Noise) Test # 28, 29, 30, 31 16 (# 7, # 8, # 9 [# 14]) V BIAS # 36 Tx AUDIO INPUT V BIAS # 32, 33, 34, 35 16 AUDIO OUTPUT (Rx) POST-PROCESS PATH TEST SIGNAL PATH # 16 # 15 V DD Test OUTPUT DRIVE SELECT # 18, 19 VCO DRIVE (Tx) dB (I & II) (GPS) (GPS) POST PROCESS GAIN (Nar./Wide) 2550Hz 20dB/dec. # 36 2dB 3000Hz LIMITER POST-DEVIATION LIMITER FILTER MIXER AMP (GPS) # 27 (GPS) SERIAL DATA INPUT Function Control Bits (#) # 41, 42, 43, 44 CHIP SELECT # # # 40 SQUELCH SYSTEM GENERAL POWERSAVE (GPS) # 45, 46 16 #/ (GPS) SERIAL INPUT PORT (Nar./Wide) DAC Threshold (GPS) SERIAL CLOCK INPUT # (1.5V to 3.5V) V SS XTAL/CLOCK 8 # 37, 38, 39 SQUELCH DETECT (-3.0dB to +4.0dB) SQUELCH SELECT XTAL 4.0MHz CLOCK OSCILLATOR AND LOGIC NOISE OUTPUT NOISE INPUT R.S.S.I. Fig.4 PMR Audio Processor - Facilities U 5 Rx (Noise) # 17 V BIAS VCO REF DRIVE (Tx) POST PROCESS AUDIO INPUT (GPS) (GPS) PRE-EMPHASIS dB 16 8 # 23, 24, 25, 26 # 20, 21, 22 (GPS) V BIAS CTCSS/DATA INPUT V BIAS OUTPUT DRIVE # 27 # + SQUELCH DRIVE SQUELCH LEVEL COMPARATOR Circuit Descriptions and Serial Control Information ...... 1 Control bits (LSB) loaded last 0 0 1 1 0 0 1 1 Mic. Select - Microphone Input 1 - Microphone Input 2 A multiplexed "microphone" input allowing the use of differing type and level voice inputs. Function Notes 2 0 1 0 1 Input Select - Rx Input De-emphasis Bypass; HPF to 0dB - Rx Input De-emphasis Select; HPF to 0dB - Tx Input Powersave De-emphasis; HPF to 14dB - Path Input to VBIAS; Powersave De-emphasis Transmit or receive audio sources are selected, inserting the appropriate path gain for the chosen input. The input path can be set to bias whilst allowing receiver noise monitoring. 3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 7 1 0 X X X 4 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 8 1 1 0 X X 5 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 9 1 1 1 0 X 6 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 14 1 1 1 1 0 Input Gain Amplifier - Gain Set 0.0dB 1.0dB 2.0dB 3.0dB 4.0dB 5.0dB 6.0dB 7.0dB 8.0dB 9.0dB 10.0dB 11.0dB 12.0dB 13.0dB 14.0dB 15.0dB A gain element intended to adjust the drive level to the compressor, catering for differing signal sources and microphone sensitivities. Compressor Enabled Powersaved Powersaved Powersaved Powersaved HPF Enabled Enabled Powersaved Powersaved Powersaved LPF Enabled Enabled Enabled Powersaved Powersaved Pre-Process Output Enabled Enabled Enabled Enabled Powersaved The Pre-Process Path LPF should be selected whilst CEPT `Response to the Tx to Mod. frequencies exceeding 3kHz' tests are carried out. 10 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 11 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 14 0 1 12 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 13 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Pre-Process Gain - Gain Set -2.75dB -2.50dB -2.25dB -2.00dB -1.75dB -1.50dB -1.25dB -1.00dB -0.75dB -0.50dB -0.25dB 0dB 0.25dB 0.50dB 0.75dB 1.00dB Pre-Process Output - Disable Pre-Process Output Output at VBIAS - Enable Pre-Process Audio Output An in-line output drive stage providing adjustable gain or attenuation to compensate for level tolerances in the external audio processes and peripherals. The output of this amplifier stage is available for further voice (audio) processing such as "Frequency Inversion Voice Scrambling." Bit 14 is the Enable/Powersave function for the Pre-Process output stages. See Bits 7 8 9 14 ..... Reference ...... Figure 4 6 Circuit Descriptions and Serial Control Information ...... 2 Control bits Element Post-Process Gain Notes A fixed 2.0dB gain stage. A selectable pre-emphasis stage set around 1.0kHz, with a characteristic of 6dB per octave. It is available for use when transmitting data signals such as FFSK. See Table below for Powersave information. A pre-set amplitude limiting stage for deviation control. 15 Pre-emphasis Deviation Limiter and 16 0 1 Post-Deviation Limiter Filter - Narrow filter bandwidth, cut-off = 2550Hz. - Wide filter bandwidth, cut-off = 3000Hz. This lowpass filter which is selected with the Deviation Limiter, is adjustable to Narrow (2550Hz) and Wide (3000Hz) bandwidths, allowing for different channel-spacing requirements. 17 0 1 CTCSS/Data Input - Disable Input path to Mixer system - Enable Input path to Mixer system 15 X 0 1 X X 18 0 1 1 1 0 19 0 0 0 1 1 Pre-Emphasis Powersaved Powersaved Enabled Powersaved Powersaved Limiter and Post-Dev LPF Powersaved Enabled Enabled Powersaved Powersaved Drive Selected Test Path Post-ProcessPath Post-Process Path Post-Process Bypass Bias 20 0 1 0 1 0 1 0 1 23 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 24 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 21 0 0 1 1 0 0 1 1 25 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 27 22 0 0 0 0 1 1 1 1 26 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 VCO Reference Drive Attenuator - Gain Set -28dB -24dB -20dB -16dB -12dB -8.0dB -4.0dB 0.0dB VCO Reference Drive Amplifier - Gain Set -2.75dB -2.50dB -2.25dB -2.00dB -1.75dB -1.50dB -1.25dB -1.00dB -0.75dB -0.50dB -0.25dB 0dB 0.25dB 0.50dB 0.75dB 1.00dB Output Drive Control The in-line control attenuator for the VCO reference channel drive output. The in-line control amplifier/attenuator for the VCO reference channel drive output. Used in conjunction with Bit 36 to control output functions. Reference ...... Figure 4 7 Circuit Descriptions and Serial Control Information ...... 3 Control bits 28 0 1 0 1 0 1 0 1 29 0 0 1 1 0 0 1 1 31 0 1 32 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 33 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 34 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 35 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 30 0 0 0 0 1 1 1 1 Element VCO Drive Attenuator I - Gain Set -22.4dB -19.2dB -16.0dB -12.8dB -9.6dB -6.4dB -3.2dB 0dB VCO Drive Attenuator II - Gain Set -25.6dB 0dB VCO Drive Amplifier - Gain Set -2.75dB -2.50dB -2.25dB -2.00dB -1.75dB -1.50dB -1.25dB -1.00dB -0.75dB -0.50dB -0.25dB 0dB 0.25dB 0.50dB 0.75dB 1.00dB Notes An in-line control attenuator for the VCO Tx channel drive output. This channel is also selected as Audio Output (Rx) under the control of bit 36. This attenuator can be used in a volume control application. An in-line control attenuator for the VCO Tx channel drive output. As an example, when bits 28 to 31 are set to "0," the gain set is -48.0dB (-22.4 + -25.6). The in-line control amplifier/attenuator for the VCO Tx channel drive output. This channel is also selected as Audio Output (Rx) under the control of bit 36. This amplifier can be used in a volume control application. 27 0 0 1 1 36 0 1 0 1 VCO Drive (Tx) VCO Ref (Tx) Audio Output Output Output (Rx) Bias Bias Bias Bias Bias Enabled Enabled Enabled Bias Enabled Enabled Enabled The Drive and Ref. paths are powersaved by Bits 45 and 46 in the "Total Powersave" or "Listening Powersave" conditions. When making internal changes it is recommended that these outputs are disconnected (placed in a bias condition) from the relevant output (load) circuitry. 37 0 1 0 1 0 1 0 1 38 0 0 1 1 0 0 1 1 39 0 0 0 0 1 1 1 1 Squelch Filter (Gain) - Gain Set -3.0dB -2.0dB -1.0dB 0dB 1.0dB 2.0dB 3.0dB 4.0dB The squelch function is set by bits 45 & 46 (Squelch Source Selection). The centre frequency gain of this element is 35dB, data selected gain variations (-3.0dB to 4.0dB) are around this value. 40 0 1 Squelch Filter (Narrow/Wide) - Narrow (c 18kHz 6.5kHz). - Wide (c 25kHz 8.5kHz). For use in wide or narrow channel systems. The squelch function is set by bits 45 & 46 (Squelch Source Selection). Reference ...... Figure 4 8 Circuit Descriptions and Serial Control Information ...... 4 Control bits 41 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 42 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 45 43 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 46 44 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Element Squelch Threshold Voltage 3.500V d.c. 3.366 3.233 3.100 2.966 2.833 2.700 2.566 2.433 2.300 2.166 2.033 1.900 1.766 1.633 1.500 Squelch Source Selector Notes The fine squelch adjustment level from the Digitalto-Analogue converter. These threshold levels are used as a comparison with the selected input noise voltage (bits 45 and 46). Variation in VDD will produce variation in threshold levels. 70.0% VDD 67.3% 64.6% 62.0% 59.3% 56.6% 54.0% 51.3% 48.6% 46.0% 43.3% 40.6% 38.0% 35.3% 32.6% 30.0% As well as selecting the input to the Noise Comparator, these two bits produce additional General Powersave (GPS) functions which control those elements not having individual serial control. 0 0 A "Total Powersave" condition Powersaved: Input Gain Amp - Post Process (2dB) Gain Amp - Mixer Amp - Noise BPF - Noise Rectifier - Squelch Comparator 1 0 1 0 1 1 Noise Input selected to Comparator R.S.S.I. input selected to Comparator Powersave but LISTENING condition R.S.S.I. input selected to Comparator Powersaved: Input Gain Amp - Post Process (2dB) Gain Amp - Mixer Amp - Noise BPF - Noise Rectifier Rx Noise Path Any high-frequency noise (18kHz/25kHz) present at the Rx Audio Input will also be available at the Noise Output pin via the squelch filter and noise rectifier (when enabled) for use as a squelch detection level. This means that the FX506 can be set to "LISTEN" with the majority of circuit elements powersaved until an R.S.S.I. level is detected and produces a "Squelch Drive output." This path, when selected, can be used as a direct path, via the Output Drive Selector (bits 18 and 19), to dynamically set and balance the VCO drive and reference output levels. Test Signal Path Reference ...... Figure 4 9 Serial Control Bits - Loading and Timing Information Data Clocked [1] t PWH [1] t PWL SERIAL CLOCK IN t DS [2] t DH bit 46 - loaded first bit 45 bit 44 bit 0 - loaded last 47-bit Data Word Latched SERIAL DATA IN t CSS t CSH [3] CHIP SELECT Fig.5 Data Load Timing Diagram Data Loading Serial Data bits, whose functions are described on the previous pages, are loaded to the FX506 using the timing format illustrated on this page. All 47 bits must be loaded. Data is loaded bit 46 first, bit 0 last. Function Serial Clock `High' Pulse Width `Low' Pulse Width Serial Data Data Set-Up Time Data Hold Time Chip Select Select Set-Up Time Select Hold Time [3] tCSS tCSH [2] tDS tDH [1] tPWH tPWL Min. Typ. Max. Unit 600 600 - - - - ns ns 360 120 - - - - ns ns 600 600 - - - - ns ns [1] [2] The Serial Clock pulses do not have to be symmetrical, as shown above, but pulse lengths must conform to the "minimum" time specification. Individual data bits (logic "1" or "0") are loaded to the device on the rising edge of the input Serial Data Clock pulse. The data hold period (tDH) is to ensure that the data level is steady when it is sampled. The full 47-bit data word is latched into the device on the rising edge of the Chip Select waveform, at this time the loaded data is acted upon and the circuit configuration/settings will change. [3] 10 System Response Characteristics 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 300 -20 200 500 1000 2000 5000 10000 3400 Gain (dB) Frequency (Hz) Fig.6 Typical Pre-Process Path Frequency Response System Frequency Characteristics Figure 6 shows a typical, response curve of the Pre-Process Path, in receive mode, set against the device specification. The general characteristic shape is produced by the Input Highpass and Lowpass Filters, without the internal pre-emphasis element. Figure 7 shows a typical response curve of the Post-Process Path set against the device specification. The general characteristic shape is produced by the Post-Deviation Limiter Filter, without the deemphasis element. 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 Gain (dB) 2700 -20 200 500 1000 2000 3400 5000 10000 Frequency (Hz) Fig.7 Typical Post-Process Path Frequency Response 11 Application Information ...... Suggested Evaluation Tests and Settings COMPRESSION CAPACITOR MIC. 1 PRE-PROCESS PATH 10mVrms DETECT 710mVrms 0dB 20dB/dec. MIC. OUTPUT 158mVrms 710mVrms 0dB PRE-PROCESS AUDIO OUTPUT 24dB External Gain 300Hz 3000Hz 600mVrms To External Audio Processes 14dB 158mVrms Tx AUDIO INPUT POST-PROCESS PATH Test From External Audio Processes 2.2V p-p (100%) Output Level dB VCO DRIVE (Tx) 755mVrms 2dB 600mVrms POST PROCESS AUDIO INPUT 20dB/dec. 2550Hz 0dB 0dB 2.2V p-p (100%) Output Level 3000Hz dB 0dB 0dB VCO REF DRIVE (Tx) CTCSS/DATA Fig.8 Transmit Path - Suggested Test Settings Active elements used in the signal path. Powersaved or by-passed elements that are not employed in the signal path. PRE-PROCESS PATH DETECT 20dB/dec. 11dB 710mVrms -2.0dB 200mVrms Rx AUDIO INPUT PRE-PROCESS AUDIO OUTPUT 300Hz INPUT H.P.F. 3000Hz 564mVrms 0dB Rx (Noise) AUDIO OUTPUT (Rx) POST-PROCESS PATH 2.2V p-p (100%) dB 710mVrms 564mVrms 2dB 3000Hz 20dB/dec. 2550Hz 0dB dB 0dB Rx (Noise) SQUELCH SYSTEM #/ DAC NOISE OUTPUT NOISE INPUT Fig.9 Receive and Squelch Paths - Suggested Test Settings 12 U + SQUELCH DRIVE Application Information Suggested Evaluation Tests and Settings Operational Information The functions of the FX506 are selected and controlled using the 47-bit Serial Data Input. This application section assists in the familiarization of control by providing example operational paths and system confidence tests. The signal levels employed in these examples are to demonstrate the functions of the device. Maximum and minimum operational signal levels are detailed in the "Specification" pages. A final output signal level of 2.2V p-p is considered, operationally, to be 100% (FM deviation). Set-up and enter the example data word in accordance with Figures 2 and 4. Test the FX506 using levels and points detailed in Tables 1, 2 and 3. Experimentation will indicate the signal element configuration and required control settings for various input and output levels. Transmit Path - 0 = logic 0 The Serial Data word below will produce the transmit element configuration shown in Figure 8. bit 0 - 01000001 11110110 X0101111 10111111 11010XXX XXXXX10 - bit 46 1 = logic 1 X = not important to the example Step 1 2 3 4 Input - Level (mV rms @ 1kHz) Output Pre-Process Audio VCO Drive/Ref. Pre-Process Audio VCO Drive and Ref. - Level (mV rms @ 1kHz) Note Output Level Ref. to Max. Mic. 1 Ext. Audio Process In Mic. 1 Ext. Audio Process In 10 750 4.8 410 750 Ext +24.0dB 1.54 VOUT 2.2Vp-p 410 Ext +24.0dB 466 70 - 100% 60% 60% Table 1 Transmit Path Operational Check To establish a 100% level for this device inject a large amplitude audio signal into the Post Process Audio Input, with the Limiter enabled. Receive Path - 0 = logic 0 The Serial Data word below will produce the receive element configuration shown in Figure 9. bit 0 - X0111010 11110010 X010XXXX XXX01111 11011XXX XXXXX10 - bit 46 1 = logic 1 X = not important to the example Step 1 2 3 4 Input - Level (mV rms @ 1kHz) Output Pre-Process Audio Audio Out (Rx) Audio Out (Rx) Audio Out (Rx) - Level (mV rms @ 1kHz) Note Output Level Ref. to Max. Rx Audio In Ext. Audio Process In Rx Audio In Rx Audio In 200 564 145 145 564 70 -100% 1.54 VOUT 2.2Vp-p 466 60% 466 60% vary bits 28 - 35 for Volume Table 2 Receive Path Operational Check To establish a 100% level for this device inject a large amplitude audio signal into the Post Process Audio Input, with the Limiter enabled. Squelch Path - 0 = logic 0 The Serial Data word below will produce the squelch element configuration shown in Figure 9. bit 0 - X00XXXXX XXXXXX0X X010XXXX XXX0XXXX XXXX1110 1110110 - bit 46 1 = logic 1 X = not important to the example Step 1 2 Input Rx Audio In Rx Audio In - Level (mV rms @ 25kHz) Output Squelch Drive Squelch Drive - Level logic "1" logic "0" Note No noise - "Noise Out" = VBIAS Noise In - "Noise Out" decreases 0 50.0 Table 3 Squelch Path Operational Check 13 Specification Absolute Maximum Ratings Exceeding the maximum rating can result in device damage. Operation of the device outside the operating limits is not implied. Supply voltage Input voltage at any pin (ref VSS = 0V) Sink/source current (supply pins) (other pins) Total device dissipation @ TAMB 25C Derating Operating temperature range: FX506P FX506LG/LS Storage temperature range: FX506P FX506LG/LS -0.3 to 7.0V -0.3 to (VDD + 0.3V) +/- 30mA +/- 20mA 800mW Max. 10mW/C -30C to +70C (plastic) -30C to +70C (plastic) -40C to +85C (plastic) -40C to +85C (plastic) Operating Limits All device characteristics are measured under the following conditions unless otherwise specified: VDD = 5.0V. TAMB = 25C. Xtal/Clock f0 = 4.0MHz. Audio level 0dB ref: = 466mV rms @ 1.0kHz (60% deviation, FM). Characteristics Static Values Supply Voltage Supply Current See Note Min. 4.5 - - - Typ. 5.0 8.0 - - - - 1.0 0.5 - 56.0 100 - - - - - 5.0 500 1.0 500 - 60.0 - 145 - - - - 600 2.2 2.2 Max. 5.5 - 1.0 1.0 - 1.5 - - - - - - - 3.0 3.0 3.0 - - - - - - 100 200 1414 4.0 1123 4.0 - - - 1.3 0.3 4.5 3.7 26.2 0.3 Unit V mA mA mA V V M k k k k M M k k k k k k dB dB mV rms mV rms mV rms V p-p mV rms V p-p mV rms V p-p V p-p dB dB dB dB dB dB (All Elements Enabled) (Listening Powersave) (Maximum Powersave) 1 1 Dynamic Values Input Logic "1" Input Logic "0" Input Impedances Digital Mic.1 or 2 Rx Audio Tx Audio CTCSS/Data External Audio Process Noise, R.S.S.I. Output Impedances Pre-Process Audio Audio Out (Rx) VCO Drive and Ref. Out Squelch Drive (Logic "1") (Logic "0") Noise Output (Diode conducting) (Diode not conducting) Signal Path Switch Isolation (Disabled) Switches Test Path Signal Input Levels Mic.1 or 2 Rx Audio Tx Audio CTCSS/Data Post Process Noise, R.S.S.I. Signal Output Levels Pre-Process Audio VCO - (Drive, Ref.) Audio (Rx (Compressor enabled) (Limiter in circuit) (Limiter in circuit) 3.5 - 0.1 - 30.0 30.0 50.0 1.0 1.0 - - - - - - - 40.0 - 10 1.0 - - - - - - - - 0.7 0.2 3.5 2.7 25.0 0.2 2 10 Variable Element Step Input Gain Amp Pre-Process Gain VCO Ref. Attenuator VCO Drive Attenuator I VCO Drive Attenuator II VCO Amplifiers (Drive and Ref.) 14 Specification ...... Characteristics Output Distortion Output Signal-to-Noise Ratio Total Harmonic Distortion Level Compressor Dynamic Range Attack Time Decay Time Deviation Limiter Input Thresholds Frequency Responses Pre-Process Path Passband Frequencies -3dB (Lower) -3dB (Upper) Passband Ripple Stopband Attenuation High Frequency Roll-off Stopband Attenuation Low Frequency Roll-off 4 6 - - -3.0 -1.5 3.0 12.0 - 6.0 - -1.5 -3.0 12.2 18.0 - -1.5 -3.0 12.2 18.0 300 - - 300 - - - -3.0 - - - - 240 4.7 - - 4.2 - 2.3 - 3.4 - - 17.0 - 2.9 - - 17.0 - - - 1.0 1.0 - - - - - 1.0 1.0 - - - 1.0 1.0 - - 3000 - - 3000 - - - 4.0 - - - - Hz kHz dB dB dB dB/oct. dB dB/oct. kHz dB dB dB dB/oct. kHz dB dB dB dB/oct. Hz dB dB/oct. Hz dB dB/oct. dB dB kHz kHz kHz kHz See Note 3, 12 4, 11 Min. 48.0 - - - - - Typ. 52.0 -40.0 30.0 7.0 1000 2.0 Max. - -30.0 - - - - Unit dBp dB dB ms ms V p-p (300Hz - 400Hz) (400Hz - 3400Hz) ( = 5kHz) ( = >5kHz, <20kHz) ( = 250Hz) ( = <250Hz) 5 5 Post-Process Path Wideband : Lowpass Frequency (-3dB) Passband Ripple (< 2700Hz) (2700Hz - 3000Hz) Stopband Attenuation ( = 5kHz) High Frequency Roll-off ( = >3kHz, <20kHz) Narrowband: Lowpass Frequency (-3dB) Passband Ripple (< 2300Hz) (2300Hz - 2550Hz) Stopband Attenuation ( = 4.25kHz) High Frequency Roll-off ( = >2.3kHz, <5.1kHz) Pre-emphasis: Passband Frequencies Gain at 1kHz Slope Characteristic De-emphasis: Passband Frequencies Gain at 1kHz Slope Characteristic Squelch Bandpass Filter Centre Frequency Gain Selectable Gain Narrow Band: Centre Frequency Bandwidth Wideband: Centre Frequency Bandwidth Notes 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. (Wide and Narrow) (8 x 1.0dB steps) (c) (c ) (c) (c ) 7 8 8 0 6.0 0 6.0 35.0 - 18.75 6.5 25.5 8.5 9 A percentage of the applied VDD (70% or 30%). These inputs are compared internally with the Digital-to-Analogue converter. With a minimum signal input level of 50mVrms at the Tx I/P or 65mVrms at the Rx I/P and an output level of 466mVrms. Levels at the input of the Limiter element, centred about V BIAS (Note 2). This parameter remains within specification when pre-emphasis is employed. With both Input HPF and LPF in circuit, but without pre-emphasis. With Limiter LPF, but without de-emphasis characteristics. This parameter remains within specification when de-emphasis is employed. The gain variation around the centre frequency (c). See Application Information pages (Suggested Evaluation Tests) for information on gain element settings. Mode: Tx with Compressor "OFF;" or in Rx, signal below limiter thresholds; Output level 466mVrms. Measured in a 30kHz bandwidth. In the Tx mode with the Input Gain Amp set to 4.0dB. 15 Package Outlines The FX506 is available in the package styles outlined below. Mechanical package diagrams and specifications are detailed in Section 10 of this document. Pin 1 identification marking is shown on the relevant diagram and pins on all package styles number anti-clockwise when viewed from the top. Handling Precautions The FX506 is a CMOS LSI circuit which includes input protection. However precautions should be taken to prevent static discharges which may cause damage. FX506LG 24-pin quad plastic encapsulated bent and cropped (L1) FX506LS 24-lead plastic leaded chip carrier (L2) NOT TO SCALE NOT TO SCALE Max. Body Length Max. Body Width 10.25mm 10.25mm Max. Body Length Max. Body Width 10.40mm 10.40mm FX506P 24-pin plastic DIL (P4) NOT TO SCALE Ordering Information FX506LG FX506LS FX506P 24-pin encapsulated bent and cropped (L1) 24-lead plastic leaded chip carrier (L2) 24-pin plastic DIL (P4) Max. Body Length Max. Body Width 31.85mm 13.82mm CML does not assume any responsibility for the use of any circuitry described. No circuit patent licences are implied and CML reserves the right at any time without notice to change the said circuitry. CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits. These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force. CML Microcircuits Product Prefix Codes Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX. This notification is relevant product information to which it is attached. Company contact information is as below: CML Microcircuits (UK)Ltd COMMUNICATION SEMICONDUCTORS CML Microcircuits (USA) Inc. COMMUNICATION SEMICONDUCTORS CML Microcircuits (Singapore)PteLtd COMMUNICATION SEMICONDUCTORS Oval Park, Langford, Maldon, Essex, CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 uk.sales@cmlmicro.com www.cmlmicro.com 4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 0800 638 5577 Fax: +1 336 744 5054 us.sales@cmlmicro.com www.cmlmicro.com No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 sg.sales@cmlmicro.com www.cmlmicro.com D/CML (D)/1 February 2002 |
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